Define duty cycle and compute a PWM signal's average voltage.
Explain why PWM controls power efficiently.
Design an RC filter to recover an analogue voltage from PWM.
Choose a PWM frequency for a given load.
A microcontroller has no analogue output — its pins are digital, and can produce only two voltages. Pulse-width modulation gets around this by switching fast between them and varying the fraction of time spent high. The duty cycle D is that fraction, and over any interval long compared with the switching period the average voltage is simply the supply scaled by it.
Vavg=D⋅Vsupplythe average of a PWM waveform
Two duty cycles on a 3.3 V rail: the waveforms are always at a rail, but their averages are not.
Two quite different things are done with this, and confusing them causes real design errors. For loads that respond slowly compared with the switching — LED brightness perceived by the eye, motor speed governed by rotor inertia, a heater's temperature — no filter is needed at all: the load does the averaging itself, and PWM controls power directly. For producing an actual analogue VOLTAGE, a filter is required, and then it is CA-6's low-pass with a cutoff far below the switching frequency.
Recovering an analogue voltage: an RC low-pass averages the PWM. Ripple falls as R, C, and the switching frequency rise.
The residual ripple on the filtered output is what remains of the switching, and a useful approximation for a simple RC is:
Vripple≈fpwmRCD(1−D)Vsupplypeak-to-peak ripple, worst at 50% duty
Note the shape of that result. Ripple is worst at 50% duty and vanishes at either extreme; it falls in proportion to switching frequency, and in proportion to the time constant. So there are three dials, and only one is free: the load usually fixes what RC can be (a large RC makes the output slow to respond), and the supply is what it is, so raising fpwm is the usual lever. The RP2040 makes that easy — its PWM blocks divide a 125 MHz clock through a 16-bit counter, so kilohertz to hundreds of kilohertz is routine.
WORKED EXAMPLE
Filtering PWM into a control voltage
Produce a 0–3.3 V analogue control voltage from a 3.3 V PWM at 10 kHz, with under 10 mV of ripple.
Worst case is 50% duty: D(1−D)=0.25.
Required: 0.25×3.3/(104×RC)≤0.010⇒RC≥0.00825 s.
Choose R=10 kΩ, C=1 µF: RC=10 ms, giving about 8 mV of ripple. ✓
Cost of that choice: the output takes about 5RC=50 ms to settle after a duty change (CA-5's five-time-constant rule). Fine for a setpoint, useless for audio.
R=10 kΩ, C=1 µF — 8 mV ripple, 50 ms settling.WORKED EXAMPLE
Choosing a frequency for a motor
A small DC motor is PWM-driven. Below about 100 Hz the motor's torque pulses audibly and mechanically.
In the audio band the switching is heard as a whine — commonly the most complained-about property of cheap motorised products.
Above about 20 kHz the whine is inaudible, but the driver's switching losses rise (each transition costs energy, ME-5's 21Cv2 again) and the MOSFET's gate drive matters more.
Typical choice: 20–25 kHz — just above hearing, below where losses become troublesome.
Just above the audio band, for reasons that are half acoustic and half thermal.
PRACTICE
Q1
A 3.3 V PWM signal has a duty cycle of 30%. What is its average voltage?
Q2
What duty cycle produces 2.0 V from a 5 V supply?
Q3
An LED is dimmed to half brightness two ways: by PWM at 50% duty, and by a transistor in its linear region dropping 2 V while the LED takes 10 mA. Compare the heat dissipated in the controlling device.
Q4
A filtered PWM output has too much ripple. Name the three quantities you could change, and state the practical cost of each.